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#include "cuda_runtime.h" |
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#include "curand.h" |
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#include "cublas_v2.h" |
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#ifdef CUDNN |
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#pragma comment(lib, "cudnn.lib") |
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#endif |
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extern "C" { |
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#include "convolutional_layer.h" |
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#include "batchnorm_layer.h" |
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#include "gemm.h" |
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#include "blas.h" |
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#include "im2col.h" |
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#include "col2im.h" |
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#include "utils.h" |
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#include "cuda.h" |
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} |
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extern "C" { |
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double get_time_point(); |
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void start_timer(); |
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void stop_timer(); |
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double get_time(); |
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void stop_timer_and_show(); |
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void stop_timer_and_show_name(char *name); |
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void show_total_time(); |
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} |
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__global__ void binarize_kernel(float *x, int n, float *binary) |
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{ |
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int i = (blockIdx.x + blockIdx.y*gridDim.x) * blockDim.x + threadIdx.x; |
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if (i >= n) return; |
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binary[i] = (x[i] >= 0) ? 1 : -1; |
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} |
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void binarize_gpu(float *x, int n, float *binary) |
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{ |
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binarize_kernel<<<cuda_gridsize(n), BLOCK>>>(x, n, binary); |
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check_error(cudaPeekAtLastError()); |
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} |
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__global__ void binarize_input_kernel(float *input, int n, int size, float *binary) |
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{ |
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int s = (blockIdx.x + blockIdx.y*gridDim.x) * blockDim.x + threadIdx.x; |
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if (s >= size) return; |
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int i = 0; |
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float mean = 0; |
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for(i = 0; i < n; ++i){ |
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mean += fabs(input[i*size + s]); |
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} |
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mean = mean / n; |
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for(i = 0; i < n; ++i){ |
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binary[i*size + s] = (input[i*size + s] > 0) ? mean : -mean; |
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} |
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} |
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void binarize_input_gpu(float *input, int n, int size, float *binary) |
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{ |
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binarize_input_kernel<<<cuda_gridsize(size), BLOCK>>>(input, n, size, binary); |
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check_error(cudaPeekAtLastError()); |
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} |
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__global__ void binarize_weights_kernel(float *weights, int n, int size, float *binary) |
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{ |
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int f = (blockIdx.x + blockIdx.y*gridDim.x) * blockDim.x + threadIdx.x; |
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if (f >= n) return; |
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int i = 0; |
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float mean = 0; |
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for(i = 0; i < size; ++i){ |
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mean += fabs(weights[f*size + i]); |
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} |
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mean = mean / size; |
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for(i = 0; i < size; ++i){ |
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binary[f*size + i] = (weights[f*size + i] > 0) ? mean : -mean; |
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//binary[f*size + i] = weights[f*size + i]; |
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} |
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} |
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void binarize_weights_gpu(float *weights, int n, int size, float *binary) |
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{ |
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binarize_weights_kernel<<<cuda_gridsize(n), BLOCK>>>(weights, n, size, binary); |
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check_error(cudaPeekAtLastError()); |
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} |
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__global__ void cuda_f32_to_f16(float* input_f32, size_t size, half *output_f16) |
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{ |
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int idx = blockIdx.x * blockDim.x + threadIdx.x; |
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if (idx < size) output_f16[idx] = __float2half(input_f32[idx]); |
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//if (idx < size) *((unsigned short *)output_f16 + idx) = __float2half(input_f32[idx]); |
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} |
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void cuda_convert_f32_to_f16(float* input_f32, size_t size, float *output_f16) { |
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cuda_f32_to_f16 <<< size / BLOCK + 1, BLOCK, 0, get_cuda_stream() >>> (input_f32, size, (half *)output_f16); |
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} |
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__global__ void cuda_f16_to_f32(half* input_f16, size_t size, float *output_f32) |
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{ |
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int idx = blockIdx.x * blockDim.x + threadIdx.x; |
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if (idx < size) output_f32[idx] = __half2float(input_f16[idx]); |
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//if (idx < size) output_f32[idx] = __half2float(*((unsigned short *)input_f16 + idx)); |
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} |
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void cuda_convert_f16_to_f32(float* input_f16, size_t size, float *output_f32) { |
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cuda_f16_to_f32 <<< size / BLOCK + 1, BLOCK, 0, get_cuda_stream() >>> ((half *)input_f16, size, output_f32); |
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} |
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half *cuda_make_f16_from_f32_array(float *src, size_t n) |
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{ |
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half *dst16; |
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size_t size = sizeof(half)*n; |
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check_error(cudaMalloc((void **)&dst16, size)); |
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if (src) { |
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cuda_convert_f32_to_f16(src, n, (float *)dst16); |
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} |
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if (!dst16) error("Cuda malloc failed\n"); |
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return dst16; |
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} |
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void forward_convolutional_layer_gpu(convolutional_layer l, network_state state) |
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{ |
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//fill_ongpu(l.outputs*l.batch, 0, l.output_gpu, 1); |
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if(l.binary){ |
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binarize_weights_gpu(l.weights_gpu, l.n, l.c*l.size*l.size, l.binary_weights_gpu); |
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swap_binary(&l); |
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} |
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if(l.xnor){ |
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if (!l.align_bit_weights_gpu || state.train) { |
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binarize_weights_gpu(l.weights_gpu, l.n, l.c*l.size*l.size, l.binary_weights_gpu); |
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} |
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//swap_binary(&l); |
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//binarize_gpu(state.input, l.c*l.h*l.w*l.batch, l.binary_input_gpu); |
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//state.input = l.binary_input_gpu; |
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//cudaDeviceSynchronize(); |
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if (l.align_bit_weights_gpu && !state.train && l.c >= 256 && l.size > 1) |
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{ |
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//return; |
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cudaError_t status = cudaSuccess; |
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int input_size = l.c*l.h*l.w*l.batch; |
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int m = l.n; |
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int k = l.size*l.size*l.c; |
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int n = l.out_w*l.out_h; |
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float * a = l.weights_gpu; |
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int ldb_align = l.lda_align; |
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size_t new_ldb = k + (ldb_align - k%ldb_align); // (k / 8 + 1) * 8; |
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size_t t_intput_size = new_ldb * n; |
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size_t t_bit_input_size = t_intput_size / 8;// +1; |
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//if(0) |
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{ |
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//cudaDeviceSynchronize(); |
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int i = 0; |
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// if (l.stride == 1 && l.c >= 256 && l.size > 1) |
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if (l.stride == 1 && l.c >= 1024 && l.size > 1 && 0)// && l.w >= 13) // disabled |
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{ |
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// stride=1 only |
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//start_timer(); |
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im2col_align_bin_ongpu(state.input + i*l.c*l.h*l.w, l.c, l.h, l.w, l.size, l.stride, l.pad, state.workspace, l.bit_align); |
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//cudaDeviceSynchronize(); |
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//stop_timer_and_show_name("im2col_align_bin_ongpu"); |
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} |
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else |
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{ |
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//start_timer(); |
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im2col_align_ongpu(state.input + i*l.c*l.h*l.w, l.c, l.h, l.w, l.size, l.stride, l.pad, l.align_workspace_gpu, l.bit_align); |
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//cudaDeviceSynchronize(); |
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//stop_timer_and_show_name("im2col_align_ongpu"); |
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//getchar(); |
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// should be optimized |
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//start_timer(); |
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float_to_bit_gpu(l.align_workspace_gpu, (unsigned char *)state.workspace, l.align_workspace_size); |
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//cudaDeviceSynchronize(); |
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//stop_timer_and_show_name("float_to_bit_gpu"); |
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} |
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//start_timer(); |
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transpose_bin_gpu((unsigned char *)state.workspace, (unsigned char *)l.transposed_align_workspace_gpu, k, n, l.bit_align, new_ldb, 8); |
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//cudaDeviceSynchronize(); |
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//stop_timer_and_show_name("transpose_bin_gpu"); |
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// should be optimized |
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//if(0) {//if (k > 1000) { // sequentially input-shared - BAD |
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// gemm_nn_custom_bin_mean_transposed_sequentially_gpu(m, n, k, |
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// (unsigned char *)l.align_bit_weights_gpu, new_ldb, (unsigned char *)l.transposed_align_workspace_gpu, new_ldb, l.output_gpu, n, l.mean_arr_gpu); |
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//} |
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//else { // coalescing & weights-shared-memory - GOOD |
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//start_timer(); |
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gemm_nn_custom_bin_mean_transposed_gpu(m, n, k, |
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(unsigned char *)l.align_bit_weights_gpu, new_ldb, (unsigned char *)l.transposed_align_workspace_gpu, |
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new_ldb, l.output_gpu, n, l.mean_arr_gpu, l.biases_gpu); |
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//cudaDeviceSynchronize(); |
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//stop_timer_and_show_name("gemm_nn_custom_bin_mean_transposed_gpu"); |
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//} |
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//cudaDeviceSynchronize(); |
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//check_error(status); |
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//getchar(); |
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} |
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/* |
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{ |
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float_to_bit_gpu(state.input, (unsigned char *)l.align_workspace_gpu, input_size); |
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convolve_bin_gpu(l.align_workspace_gpu, (float *)l.align_bit_weights_gpu, l.output_gpu, l.w, l.h, l.c, l.n, l.size, l.pad, l.new_lda, l.mean_arr_gpu); |
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//convolve_gpu(state.input, l.weights_gpu, l.output_gpu, l.w, l.h, l.c, l.n, l.size, l.pad); |
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//cudaDeviceSynchronize(); |
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//check_error(status); |
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add_bias_gpu(l.output_gpu, l.biases_gpu, l.batch, l.n, l.out_w*l.out_h); |
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} |
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*/ |
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//add_bias_gpu(l.output_gpu, l.biases_gpu, l.batch, l.n, l.out_w*l.out_h); |
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if(l.activation != LINEAR) activate_array_ongpu(l.output_gpu, l.outputs*l.batch, l.activation); |
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//if (l.binary || l.xnor) swap_binary(&l); |
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//cudaDeviceSynchronize(); |
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return; |
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} |
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} |
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if (l.xnor) { |
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swap_binary(&l); |
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binarize_gpu(state.input, l.c*l.h*l.w*l.batch, l.binary_input_gpu); |
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state.input = l.binary_input_gpu; |
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} |
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//fill_ongpu(l.outputs*l.batch, 0, l.output_gpu, 1); |
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#ifdef CUDNN |
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float one = 1; // alpha[0], beta[0] is float for HALF and FLOAT |
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float alpha = 1, beta = 0; |
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#ifdef CUDNN_HALF |
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// Note: For improved performance it is advised to use beta[0] = 0.0. |
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// For Tensor Core: cudnnSetConvolutionMathType() where cudnnMathType_t mathType = CUDNN_TENSOR_OP_MATH; |
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// 1. or CUDNN_CONVOLUTION_FWD_ALGO_IMPLICIT_PRECOMP_GEMM and use CUDNN_DATA_HALF |
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// 2. or CUDNN_CONVOLUTION_FWD_ALGO_WINOGRAD_NONFUSED |
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// More: http://docs.nvidia.com/deeplearning/sdk/cudnn-developer-guide/index.html#tensor_ops |
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const size_t input16_size = l.batch*l.c*l.w*l.h; |
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const size_t output16_size = l.batch*l.out_c*l.out_h*l.out_w; |
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if (*state.net.max_input16_size < input16_size) { |
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//printf("\n input16_size: cur = %zu \t max = %zu \n", input16_size, *state.net.max_input16_size); |
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*state.net.max_input16_size = input16_size; |
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if (*state.net.input16_gpu) cuda_free(*state.net.input16_gpu); |
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*state.net.input16_gpu = (float *)cuda_make_f16_from_f32_array(NULL, *state.net.max_input16_size); |
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} |
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float *input16 = *state.net.input16_gpu; |
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if (*state.net.max_output16_size < output16_size) { |
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*state.net.max_output16_size = output16_size; |
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if (*state.net.output16_gpu) cuda_free(*state.net.output16_gpu); |
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*state.net.output16_gpu = (float *)cuda_make_f16_from_f32_array(NULL, *state.net.max_output16_size); |
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} |
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float *output16 = *state.net.output16_gpu; |
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cuda_convert_f32_to_f16(state.input, input16_size, input16); |
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//fill_ongpu(output16_size / 2, 0, (float *)output16, 1); |
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cudnnConvolutionForward(cudnn_handle(), |
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&alpha, |
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l.srcTensorDesc, |
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input16, |
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l.weightDesc, |
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l.weights_gpu16, |
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l.convDesc, |
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l.fw_algo, |
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state.workspace, |
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l.workspace_size, |
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&beta, |
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l.dstTensorDesc, |
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output16); |
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if (l.batch_normalize) |
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{ |
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if (state.train) // Training |
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{ |
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copy_ongpu(l.outputs*l.batch / 2, output16, 1, l.x_gpu, 1); |
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//cudaMemcpyAsync(l.x_gpu, output16, l.outputs*l.batch*sizeof(half), cudaMemcpyDefault, get_cuda_stream()); |
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float one = 1; |
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float zero = 0; |
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// Batch-normalization can still take FP16 inputs and outputs, saving half the bandwidth |
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// compared to FP32, it<EFBFBD>s just that the statistics and value adjustment should be done in FP32. |
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cudnnBatchNormalizationForwardTraining(cudnn_handle(), |
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CUDNN_BATCHNORM_SPATIAL, |
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&one, |
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&zero, |
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l.normDstTensorDescF16, |
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l.x_gpu, // input |
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l.normDstTensorDescF16, |
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output16, // output |
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l.normTensorDesc, |
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l.scales_gpu, |
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l.biases_gpu, |
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.01, |
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l.rolling_mean_gpu, // output (should be FP32) |
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l.rolling_variance_gpu, // output (should be FP32) |
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.00001, |
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l.mean_gpu, // output (should be FP32) |
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l.variance_gpu); // output (should be FP32) |
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cuda_convert_f16_to_f32(output16, output16_size, l.output_gpu); |
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//forward_batchnorm_layer_gpu(l, state); |
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} |
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else // Detection |
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{ |
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cuda_convert_f16_to_f32(output16, output16_size, l.output_gpu); |
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normalize_gpu(l.output_gpu, l.rolling_mean_gpu, l.rolling_variance_gpu, l.batch, l.out_c, l.out_h*l.out_w); |
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scale_bias_gpu(l.output_gpu, l.scales_gpu, l.batch, l.out_c, l.out_h*l.out_w); |
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add_bias_gpu(l.output_gpu, l.biases_gpu, l.batch, l.out_c, l.out_w*l.out_h); |
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} |
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} |
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else // BIAS only |
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{ |
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cuda_convert_f16_to_f32(output16, output16_size, l.output_gpu); |
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add_bias_gpu(l.output_gpu, l.biases_gpu, l.batch, l.n, l.out_w*l.out_h); |
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} |
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#else |
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cudnnConvolutionForward(cudnn_handle(), |
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&alpha, //&one, |
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l.srcTensorDesc, |
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state.input, |
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l.weightDesc, |
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l.weights_gpu, |
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l.convDesc, |
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l.fw_algo, |
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state.workspace, |
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l.workspace_size, |
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&beta, //&one, |
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l.dstTensorDesc, |
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l.output_gpu); |
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//cudaDeviceSynchronize(); |
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#endif // CUDNN_HALF |
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#else |
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fill_ongpu(l.outputs*l.batch, 0, l.output_gpu, 1); |
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int i; |
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int m = l.n; |
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int k = l.size*l.size*l.c; |
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int n = l.out_w*l.out_h; |
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for(i = 0; i < l.batch; ++i){ |
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float *im = state.input + i*l.c*l.h*l.w; |
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float * a = l.weights_gpu; |
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float * b = state.workspace; |
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float * c = l.output_gpu; |
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if (l.size == 1) { |
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b = im; |
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} |
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else { |
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im2col_ongpu(im, l.c, l.h, l.w, l.size, l.stride, l.pad, state.workspace); |
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} |
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gemm_ongpu(0,0,m,n,k,1.,a,k,b,n,1.,c+i*m*n,n); |
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} |
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#endif |
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#ifndef CUDNN_HALF |
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if (l.batch_normalize) { |
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forward_batchnorm_layer_gpu(l, state); |
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} |
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else { |
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add_bias_gpu(l.output_gpu, l.biases_gpu, l.batch, l.n, l.out_w*l.out_h); |
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} |
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#endif // no CUDNN_HALF |
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if (l.activation != LINEAR) activate_array_ongpu(l.output_gpu, l.outputs*l.batch, l.activation); |
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//if(l.dot > 0) dot_error_gpu(l); |
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if(l.binary || l.xnor) swap_binary(&l); |
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//cudaDeviceSynchronize(); // for correct profiling of performance |
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} |
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void backward_convolutional_layer_gpu(convolutional_layer l, network_state state) |
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{ |
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gradient_array_ongpu(l.output_gpu, l.outputs*l.batch, l.activation, l.delta_gpu); |
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backward_bias_gpu(l.bias_updates_gpu, l.delta_gpu, l.batch, l.n, l.out_w*l.out_h); |
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#ifndef CUDNN_HALF |
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if(l.batch_normalize){ |
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backward_batchnorm_layer_gpu(l, state); |
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|
} else { |
|
|
//backward_bias_gpu(l.bias_updates_gpu, l.delta_gpu, l.batch, l.n, l.out_w*l.out_h); |
|
|
} |
|
|
#endif // no CUDNN_HALF |
|
|
float *original_input = state.input; |
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|
|
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|
if(l.xnor) state.input = l.binary_input_gpu; |
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|
#ifdef CUDNN |
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|
float one = 1; |
|
|
float alpha = 1, beta = 0; |
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|
|
|
|
#ifdef CUDNN_HALF |
|
|
|
|
|
const size_t input16_size = l.batch*l.c*l.w*l.h; |
|
|
const size_t delta16_size = l.batch*l.n*l.out_w*l.out_h; |
|
|
|
|
|
if (*state.net.max_input16_size < input16_size) { |
|
|
*state.net.max_input16_size = input16_size; |
|
|
if(*state.net.input16_gpu) cuda_free(*state.net.input16_gpu); |
|
|
*state.net.input16_gpu = (float *)cuda_make_f16_from_f32_array(NULL, *state.net.max_input16_size); |
|
|
} |
|
|
float *input16 = *state.net.input16_gpu; |
|
|
|
|
|
if (*state.net.max_output16_size < delta16_size) { |
|
|
*state.net.max_output16_size = delta16_size; |
|
|
if(*state.net.output16_gpu) cuda_free(*state.net.output16_gpu); |
|
|
*state.net.output16_gpu = (float *)cuda_make_f16_from_f32_array(NULL, *state.net.max_output16_size); |
|
|
} |
|
|
float *delta16 = *state.net.output16_gpu; |
|
|
|
|
|
cuda_convert_f32_to_f16(state.input, input16_size, input16); |
|
|
cuda_convert_f32_to_f16(l.delta_gpu, delta16_size, delta16); |
|
|
|
|
|
if (l.batch_normalize) { |
|
|
//if (!state.train) { |
|
|
// l.mean_gpu = l.rolling_mean_gpu; |
|
|
// l.variance_gpu = l.rolling_variance_gpu; |
|
|
//} |
|
|
float one = 1; |
|
|
float zero = 0; |
|
|
cudnnBatchNormalizationBackward(cudnn_handle(), |
|
|
CUDNN_BATCHNORM_SPATIAL, |
|
|
&one, |
|
|
&zero, |
|
|
&one, |
|
|
&one, |
|
|
l.normDstTensorDescF16, |
|
|
l.x_gpu, // input |
|
|
l.normDstTensorDescF16, |
|
|
delta16, // input |
|
|
l.normDstTensorDescF16, |
|
|
l.x_norm_gpu, // output |
|
|
l.normTensorDesc, |
|
|
l.scales_gpu, // output (should be FP32) |
|
|
l.scale_updates_gpu, // output (should be FP32) |
|
|
l.bias_updates_gpu, // output (should be FP32) |
|
|
.00001, |
|
|
l.mean_gpu, // input (should be FP32) |
|
|
l.variance_gpu); // input (should be FP32) |
|
|
copy_ongpu(l.outputs*l.batch / 2, l.x_norm_gpu, 1, delta16, 1); |
|
|
//cudaMemcpyAsync(delta16, l.x_norm_gpu, l.outputs*l.batch * sizeof(half), cudaMemcpyDefault, get_cuda_stream()); |
|
|
} |
|
|
else |
|
|
{ |
|
|
//backward_bias_gpu(l.bias_updates_gpu, l.delta_gpu, l.batch, l.n, l.out_w*l.out_h); |
|
|
} |
|
|
|
|
|
// convert input: state.input (x), l.delta_gpu (y) from fp32 to fp16 |
|
|
// get output: l.weight_updates_gpu (dw) and convert it to fp32 (ONLY if it is fp16) |
|
|
|
|
|
// calculate conv weight updates |
|
|
// Already: l.weight_updates_gpu = (l.weight_updates_gpu - l.weight*decay*batch*subdivision)*momentum |
|
|
// so we should copy f32 to f16, or compute: f16=(w_up - w*d*b*s)*m |
|
|
cuda_convert_f32_to_f16(l.weight_updates_gpu, l.c*l.n*l.size*l.size, l.weight_updates_gpu16); |
|
|
|
|
|
cudnnConvolutionBackwardFilter(cudnn_handle(), |
|
|
&one, |
|
|
l.srcTensorDesc, |
|
|
input16, //state.input, |
|
|
l.ddstTensorDesc, |
|
|
delta16, //l.delta_gpu, |
|
|
l.convDesc, |
|
|
l.bf_algo, |
|
|
state.workspace, |
|
|
l.workspace_size, |
|
|
&one, |
|
|
l.dweightDesc, |
|
|
l.weight_updates_gpu16); // l.weight_updates_gpu); |
|
|
|
|
|
cuda_convert_f16_to_f32(l.weight_updates_gpu16, l.c*l.n*l.size*l.size, l.weight_updates_gpu); |
|
|
|
|
|
if (state.delta) { |
|
|
if (l.binary || l.xnor) swap_binary(&l); |
|
|
|
|
|
// http://docs.nvidia.com/deeplearning/sdk/cudnn-developer-guide/index.html#cudnnConvolutionBackwardData |
|
|
// calculate delta for the next layer |
|
|
// convert input: l.weights_gpu (w), l.delta_gpu (dy) from fp32 to fp16 |
|
|
// get output: state.delta (dx) and convert it to fp32 (ONLY if it is fp16) |
|
|
cudnnConvolutionBackwardData(cudnn_handle(), |
|
|
&alpha, |
|
|
l.weightDesc, |
|
|
l.weights_gpu16, //l.weights_gpu, |
|
|
l.ddstTensorDesc, |
|
|
delta16, //l.delta_gpu, |
|
|
l.convDesc, |
|
|
l.bd_algo, |
|
|
state.workspace, |
|
|
l.workspace_size, |
|
|
&beta, |
|
|
l.dsrcTensorDesc, |
|
|
input16); // state.delta); |
|
|
|
|
|
cuda_convert_f16_to_f32(input16, input16_size, state.delta); |
|
|
|
|
|
if (l.binary || l.xnor) swap_binary(&l); |
|
|
if (l.xnor) gradient_array_ongpu(original_input, l.batch*l.c*l.h*l.w, HARDTAN, state.delta); |
|
|
} |
|
|
#else // CUDNN_HALF |
|
|
|
|
|
// calculate conv weight updates |
|
|
// if used: beta=1 then loss decreases faster |
|
|
cudnnConvolutionBackwardFilter(cudnn_handle(), |
|
|
&one, |
|
|
l.srcTensorDesc, |
|
|
state.input, |
|
|
l.ddstTensorDesc, |
|
|
l.delta_gpu, |
|
|
l.convDesc, |
|
|
l.bf_algo, |
|
|
state.workspace, |
|
|
l.workspace_size, |
|
|
&one, |
|
|
l.dweightDesc, |
|
|
l.weight_updates_gpu); |
|
|
|
|
|
if(state.delta){ |
|
|
if(l.binary || l.xnor) swap_binary(&l); |
|
|
// http://docs.nvidia.com/deeplearning/sdk/cudnn-developer-guide/index.html#cudnnConvolutionBackwardData |
|
|
// calculate delta for the next layer |
|
|
cudnnConvolutionBackwardData(cudnn_handle(), |
|
|
&one, |
|
|
l.weightDesc, |
|
|
l.weights_gpu, |
|
|
l.ddstTensorDesc, |
|
|
l.delta_gpu, |
|
|
l.convDesc, |
|
|
l.bd_algo, |
|
|
state.workspace, |
|
|
l.workspace_size, |
|
|
&one, |
|
|
l.dsrcTensorDesc, |
|
|
state.delta); |
|
|
if(l.binary || l.xnor) swap_binary(&l); |
|
|
if(l.xnor) gradient_array_ongpu(original_input, l.batch*l.c*l.h*l.w, HARDTAN, state.delta); |
|
|
} |
|
|
|
|
|
#endif // CUDNN_HALF |
|
|
|
|
|
#else // CUDNN |
|
|
int m = l.n; |
|
|
int n = l.size*l.size*l.c; |
|
|
int k = l.out_w*l.out_h; |
|
|
|
|
|
int i; |
|
|
for(i = 0; i < l.batch; ++i){ |
|
|
float * a = l.delta_gpu; |
|
|
float * b = state.workspace; |
|
|
float * c = l.weight_updates_gpu; |
|
|
|
|
|
im2col_ongpu(state.input + i*l.c*l.h*l.w, l.c, l.h, l.w, l.size, l.stride, l.pad, state.workspace); |
|
|
gemm_ongpu(0,1,m,n,k,1,a + i*m*k,k,b,k,1,c,n); |
|
|
|
|
|
if(state.delta){ |
|
|
if(l.binary || l.xnor) swap_binary(&l); |
|
|
float * a = l.weights_gpu; |
|
|
float * b = l.delta_gpu; |
|
|
float * c = state.workspace; |
|
|
|
|
|
gemm_ongpu(1,0,n,k,m,1,a,n,b + i*k*m,k,0,c,k); |
|
|
|
|
|
col2im_ongpu(state.workspace, l.c, l.h, l.w, l.size, l.stride, l.pad, state.delta + i*l.c*l.h*l.w); |
|
|
if(l.binary || l.xnor) { |
|
|
swap_binary(&l); |
|
|
} |
|
|
if(l.xnor) gradient_array_ongpu(original_input + i*l.c*l.h*l.w, l.c*l.h*l.w, HARDTAN, state.delta + i*l.c*l.h*l.w); |
|
|
} |
|
|
} |
|
|
#endif |
|
|
} |
|
|
|
|
|
void pull_convolutional_layer(convolutional_layer layer) |
|
|
{ |
|
|
cuda_pull_array(layer.weights_gpu, layer.weights, layer.c*layer.n*layer.size*layer.size); |
|
|
cuda_pull_array(layer.biases_gpu, layer.biases, layer.n); |
|
|
cuda_pull_array(layer.weight_updates_gpu, layer.weight_updates, layer.c*layer.n*layer.size*layer.size); |
|
|
cuda_pull_array(layer.bias_updates_gpu, layer.bias_updates, layer.n); |
|
|
if (layer.batch_normalize){ |
|
|
cuda_pull_array(layer.scales_gpu, layer.scales, layer.n); |
|
|
cuda_pull_array(layer.rolling_mean_gpu, layer.rolling_mean, layer.n); |
|
|
cuda_pull_array(layer.rolling_variance_gpu, layer.rolling_variance, layer.n); |
|
|
} |
|
|
if (layer.adam){ |
|
|
cuda_pull_array(layer.m_gpu, layer.m, layer.c*layer.n*layer.size*layer.size); |
|
|
cuda_pull_array(layer.v_gpu, layer.v, layer.c*layer.n*layer.size*layer.size); |
|
|
} |
|
|
} |
|
|
|
|
|
void push_convolutional_layer(convolutional_layer layer) |
|
|
{ |
|
|
cuda_push_array(layer.weights_gpu, layer.weights, layer.c*layer.n*layer.size*layer.size); |
|
|
#ifdef CUDNN_HALF |
|
|
cuda_convert_f32_to_f16(layer.weights_gpu, layer.c*layer.n*layer.size*layer.size, layer.weights_gpu16); |
|
|
#endif |
|
|
cuda_push_array(layer.biases_gpu, layer.biases, layer.n); |
|
|
cuda_push_array(layer.weight_updates_gpu, layer.weight_updates, layer.c*layer.n*layer.size*layer.size); |
|
|
cuda_push_array(layer.bias_updates_gpu, layer.bias_updates, layer.n); |
|
|
if (layer.batch_normalize){ |
|
|
cuda_push_array(layer.scales_gpu, layer.scales, layer.n); |
|
|
cuda_push_array(layer.rolling_mean_gpu, layer.rolling_mean, layer.n); |
|
|
cuda_push_array(layer.rolling_variance_gpu, layer.rolling_variance, layer.n); |
|
|
} |
|
|
if (layer.adam){ |
|
|
cuda_push_array(layer.m_gpu, layer.m, layer.c*layer.n*layer.size*layer.size); |
|
|
cuda_push_array(layer.v_gpu, layer.v, layer.c*layer.n*layer.size*layer.size); |
|
|
} |
|
|
} |
|
|
|
|
|
void update_convolutional_layer_gpu(convolutional_layer layer, int batch, float learning_rate, float momentum, float decay) |
|
|
{ |
|
|
int size = layer.size*layer.size*layer.c*layer.n; |
|
|
axpy_ongpu(layer.n, learning_rate/batch, layer.bias_updates_gpu, 1, layer.biases_gpu, 1); |
|
|
scal_ongpu(layer.n, momentum, layer.bias_updates_gpu, 1); |
|
|
|
|
|
if(layer.scales_gpu){ |
|
|
axpy_ongpu(layer.n, learning_rate/batch, layer.scale_updates_gpu, 1, layer.scales_gpu, 1); |
|
|
scal_ongpu(layer.n, momentum, layer.scale_updates_gpu, 1); |
|
|
} |
|
|
|
|
|
if(layer.adam){ |
|
|
scal_ongpu(size, layer.B1, layer.m_gpu, 1); |
|
|
scal_ongpu(size, layer.B2, layer.v_gpu, 1); |
|
|
|
|
|
axpy_ongpu(size, -decay*batch, layer.weights_gpu, 1, layer.weight_updates_gpu, 1); |
|
|
|
|
|
axpy_ongpu(size, -(1-layer.B1), layer.weight_updates_gpu, 1, layer.m_gpu, 1); |
|
|
mul_ongpu(size, layer.weight_updates_gpu, 1, layer.weight_updates_gpu, 1); |
|
|
axpy_ongpu(size, (1-layer.B2), layer.weight_updates_gpu, 1, layer.v_gpu, 1); |
|
|
|
|
|
adam_gpu(size, layer.weights_gpu, layer.m_gpu, layer.v_gpu, layer.B1, layer.B2, learning_rate/batch, layer.eps, layer.t+1); |
|
|
fill_ongpu(size, 0, layer.weight_updates_gpu, 1); |
|
|
}else{ |
|
|
// update weights: |
|
|
// weights_gpu = weights_gpu*(1 - decay*lr) + weight_updates_gpu*lr / (batch*subdivision) = |
|
|
// weights_gpu*(1 - 0.0005*0.001) + weight_updates_gpu*0.001/(64*8) = |
|
|
// weights_gpu * 0.999 999 5 + weight_updates_gpu * 0.000 001 953125 |
|
|
// |
|
|
// weight_updates_gpu = (weight_updates_gpu - weights_gpu*decay*batch*subdivision)*momentum = |
|
|
// (weight_updates_gpu - weights_gpu * 0.0005 * 64 * 8) * 0.9 = |
|
|
// weight_updates_gpu*0.9 - weights_gpu*0.2304 |
|
|
axpy_ongpu(size, -decay*batch, layer.weights_gpu, 1, layer.weight_updates_gpu, 1); |
|
|
axpy_ongpu(size, learning_rate/batch, layer.weight_updates_gpu, 1, layer.weights_gpu, 1); |
|
|
scal_ongpu(size, momentum, layer.weight_updates_gpu, 1); |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
|
